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document number: mc34825 rev 2.0, 3/2010 freescale semiconductor advance information * this document contains certain information on a new product. specifications and information herein are subject to change without notice. ? freescale semiconductor, in c., 2010. all rights reserved. micro-usb interface ic supporting universal charging solution and wired accessories the 34825 is designed to support the universal charging solution (ucs) recommended by the omtp (open mobile terminal platform), as well as to use the same 5-pin mi cro or mini-usb connector for other wired accessories. the 34825 supports various types of external power supplies, such as a dedicated ac/dc adapter or a usb port, to charge the battery. it has functions built in to identify the type of the power supply, and sets low or high charging current, based on the current capability of the power supply. the 34825 monitors the power supply, and offers an up to 28 v of over-voltage protection (ovp) to the cell phone against failed power supplies. the 34825 also contains analog switches to multiplex t he 5 pins, to support uart and high speed usb data communication, mono or stereo audio headset with or without a microphone and a cord remote controller, manufacturing or research- and-development (r/d) test ca bles, and other accessories. the 34825 monitors both the vbus status and the resistance between the id pin and the ground to identify the accessory being plugged into the mini or micro-usb connector. a high-accuracy 5-bit adc is offered to distinguish 32 levels of id resistance that are assigned to buttons in a cord remote controller or to i dentification (id) resistors of accessories. after iden tifying the attached accessory, the 34825 sends an interrupt signal to a host ic and the host ic can configure the analog switches via an i 2 c serial bus for further actions. when the accessory is detached from the cell phone, an interrupt signal is also sent to inform the host. features ? identifies various types of po wer supplies to set low or high battery-charging-current levels ? internal power switch to offer ovp against up to 28 v failed power supply input ? supports stereo/mono headset with or without microphone and remote controller with pure passive components ? supports usb or uart r/d test cables ? high speed (480 mbps) usb 2.0 compliant ? supports 32 id resistance values with a high accuracy 5- bit adc ? accessory attachment and det achment detection with an interrupt signal to the host ic ?i 2 c interface ?10 a quiescent current in standby mode ? pb-free packaging designated by suffix code ep figure 1. 34825 simplified application diagram interface ic 34825 ordering information device temperature range (t a ) package mc34825ep/r2 -40c to 85c 3mm x 3mm utqfn (pb-free) 98asa00037d 20-pin qfn i2c vddio i2c_scl baseband 34825 i2c_sda int rxd d- txd d+ spk_l id dp dm spk_r mic iset out vbus vdd gnd charger gpio uart usb xcvr audio v bus id d+ d- gnd usb connector li+
analog integrated circuit device data 2 freescale semiconductor 34825 internal block diagram internal block diagram figure 2. 34825 simplifi ed internal block diagram vddio i 2 c_sda i 2 c_scl int rxd txd d+ d- spk_r spk_l mic gnd id dm dp iset out vbus vdd reset i 2 c interface interrupt uart switches usb switches audio switches vbus osc vbus detect registers and state machine internal supplies gate drive & ocp id adc id detect
analog integrated circuit device data freescale semiconductor 3 34825 pin connections pin connections figure 3. 34825 pin connections table 1. 34825 pin definitions a functional description of each pin can be found in the functional pin description section on page 13 . pin number pin name pin function formal name definition 1 spk_r input speaker right channel right channel input for speaker signals 2 spk_l input speaker left channel left channel input for speaker signals 3 mic output microphone output microphone output to the baseband of the cell phone system 4 d+ io d+ of the usb transceiver d+ line of the usb transceiver 5 d- io d- of the usb transceiver d- line of the usb transceiver 6 rxd output uart receiver receive line of the uart 7 txd input uart transmitter transmit line of the uart 8 nc no connection no connection no connection 9 vddio input io power supply io supply voltage. the vddio voltage is used as the reference voltage for the i 2 c bus signals. this pin also f unctions as a hardware reset to the ic. 10 nc no connection no connection no connection 11 vdd input power supply ic power supply input 12 int output interrupt output open-drain interrupt output 13 i 2 c_sda io i 2 c data data line of the i 2 c interface 14 i 2 c_scl input i 2 c clock clock line of the i 2 c interface 15 out output power output the output of the power mosfet pass switch 16 iset output charge current setting open-drain output to set the charger current 17 vbus input vbus power supply vbus line of the mini or micro-usb connector transparent top view spk_r spk_l mic d+ d- rxd txd nc vddio nc vdd int i 2 c_sda i 2 c_scl out iset vbus dm dp id gnd 1 2 3 4 5 678910 11 12 13 14 15 16 17 18 19 20 21
analog integrated circuit device data 4 freescale semiconductor 34825 pin connections 18 dm io d- of the usb connector d- line of the mini or micro-usb connector 19 dp io d+ of the usb connector d+ line of the mini or micro-usb connector 20 id input id of the usb connector id pin of the mini or micro-usb connector 21 gnd ground ground ground table 1. 34825 pin de finitions (continued) a functional description of each pin can be found in the functional pin description section on page 13 . pin number pin name pin function formal name definition
analog integrated circuit device data freescale semiconductor 5 34825 electrical characteristics maximum ratings electrical characteristics maximum ratings table 2. maximum ratings exceeding these ratings may cause a malfunc tion or permanent damage to the device. ratings symbol value unit electrical ratings input voltage range vbus pin out pin spk_l, spk_r, dp, and dm pins all other pins v bus v out -0.3 to 28 -0.3 to 8.0 -2.0 to v dd +0.3 -0.3 to 5.5 v esd voltage (1) human body model (hbm) for vbus, dp, dm, id pins human body model (hbm) for all other pins machine model (mm) v esd 8000 2000 200 v thermal ratings operating temperature ambient junction t a t j -40 to +85 150 c storage temperature t stg -65 to +150 c thermal resistance (2) junction-to-case junction-to-ambient r jc r ja 6.0 45 c/w peak package reflow temperature during reflow (3) , (4) t pprt note 4 c notes 1. esd testing is performed in accordance with the human body model (hbm) (c zap = 100 pf, r zap = 1500 ), and the machine model (mm) (c zap = 200 pf, r zap = 0 ). 2. device mounted on the freescale evb test board per jedec desd51-2. 3. pin soldering temperature limit is for 10 seconds maximum dura tion. not designed for immersion so ldering. exceeding these lim its may cause malfunction or permanent damage to the device. 4. freescale?s package reflow capability m eets pb-free requirements for jedec standard j-std-020c. for peak package reflow temperature and moisture sensitivity levels (msl), go to www.freescale.com, search by part number [e.g. remove prefixes/suffixe s and enter the core id to view all orderable parts (i .e. mc33xxxd enter 33xxx)], and review parametrics.
analog integrated circuit device data 6 freescale semiconductor 34825 electrical characteristics static electrical characteristics static electrical characteristics table 3. static electric al characteristics characteristics noted under conditions v dd = 3.6 v, v bus = 5.0 v, v ddio = 3.0 v, -40c t a 85c (see figure 1 ), unless otherwise noted. typical values noted re flect the approximate parameter means at v dd = 3.6 v and t a = 25c under nominal conditions, unless otherwise noted. characteristic symbol min typ max unit power input vdd supply voltage v dd 2.7 - 5.5 v vdd power-on-reset threshold rising edge hysteresis v vddpor - - 2.5 100 2.65 - v mv vdd quiescent current in standby mode in power save mode in active mode (v dd < v bus ) in active mode (v dd > v bus ) i vdd - - - - 9.0 16 550 850 12 22 650 1000 a vbus supply voltage v bus 2.8 5.0 28 v vbus detection threshold voltage rising edge hysteresis v bus_det - - 2.65 150 2.80 - v mv vbus supply quiescent current in vbus power mode in active mode - dedicated charger in active mode - power mosfet is off (v bus < v dd ) i vbus - - - - - - 1.2 1.2 0.5 ma ma a vbus over-voltage protection threshold rising edge hysteresis v bus_ovp 6.8 - 7.0 150 7.2 - v mv vbus over-current protection threshold triggering threshold (at onset of otp shutoff) i bus_ocp 1.2 1.8 2.2 a over-temperature protection threshold rising threshold falling threshold t otp 115 - 130 95 145 - c vddio supply voltage v ddio 1.65 - 3.6 v switch iset open-drain output mosfet on resistance (loaded by 3.0 ma current) leakage current (when the mosfet is off at 5.0 v bias voltage) r isetb i iset_off - - - - 100 0.5 a out pin discharge mosfet (1) on resistance (loaded by 3.0 ma current) leakage current (when the mosfet is off at 5.0 v bias voltage) r out_disc i out_off - - - 0.5 100 - a power mosfet on resistance (when v bus = 5.0 v, t a < 50c) r psw - 200 250 m
analog integrated circuit device data freescale semiconductor 7 34825 electrical characteristics static electrical characteristics spk_l and spk_r switches on resistance (20 hz to 470 khz) matching between channels on resistance flatness (from -1.2 to 1.2 v) r spk_on r spk_onmct r spk_onflt - - - 1.6 0.05 0.01 3.0 0.15 0.05 d+ and d- switches on resistance (0.1 hz to 240 mhz) matching between channels on resistance flatness (from 0.0 to 3.3 v) r usb_on r usb_onmct r usb_onflt - - - - 0.1 0.02 5.0 0.5 0.1 rxd and txd switches on resistance on resistance flatness (from 0.0 to 3.3v) r uart_on r uart_onflt - - - - 60 5.0 mic switch on resistance (at below 2.5 v mic bias voltage) on resistance flatness (from 1.8 to 2.3 v) r mic_on r mic_onflt - - - - 100 5.0 pull-down resistors between spk_l or spk_r pins to gnd r pd_audio - 100 - k signal voltage range spk_l, spk_r, d+, d-, rxd, txd, mic -1.5 -0.3 - - 1.5 3.6 v psrr - from vdd (100 mvrms) to dp/dm pins (4) 20 hz to 20 khz with 32/16 load. v a_psrr - - -60 db total harmonic distortion (4) 20 hz to 20 khz with 32/16 load. thd - - 0.05 % crosstalk between two channels less than 1.0mhz v a_ct - -60 - db off-channel isolation less than 1.0 mhz v a_iso - -80 - db power supply type identification data source voltage loaded by 0~200 a v dat_src 0.5 0.6 0.7 v data source current i dat_src 0 - 200 a data detect voltage low threshold high threshold v dat_ref 0.3 0.8 0.35 0.9 0.4 1.0 v data sink current dm pin is biased between 0.15 to 3.6 v i dat_sink 65 100 135 a dp, dm pin capacitance c dp/dm - 8 - pf dp, dm pin impedance all switches are off r dp/dm - 50 - m table 3. static electrical characteristics (continued) characteristics noted under conditions v dd = 3.6 v, v bus = 5.0 v, v ddio = 3.0 v, -40c t a 85c (see figure 1 ), unless otherwise noted. typical values noted refl ect the approximate par ameter means at v dd = 3.6 v and t a = 25c under nominal conditions, unless otherwise noted. characteristic symbol min typ max unit
analog integrated circuit device data 8 freescale semiconductor 34825 electrical characteristics static electrical characteristics id detection id_float threshold detection threshold v float - 2.3 - v pull-up current source when adc result is 1xxxx when adc result is 0xxxx i id 1.9 30.4 2.0 32 2.1 33.6 a id shorted to ground detection detection current detection voltage threshold i vcbl v vcbl_l 1.0 - 1.2 50 1.4 - ma mv logic input and output vddio logic input level input low level input high level v ddio_il v ddio_ih - 1.5 - - 0.5 - v v push-pull logic output output high level (loaded by 1.0 ma current) output low level (loaded by 4.0 ma current) v oh v ol 0.7v ddio - - - - 0.4 v open-drain logic output ( int ) output low level (loaded by 4.0 ma current) v odol - - 0.4 v i 2 c interface (4) low voltage on i 2 c_sda, i 2 c_scl inputs v i2c_il -0.2 - 0.3v ddio v high voltage on i 2 c_sda, i 2 c_scl inputs v i2c_ih 0.7v ddio - v ddio v low voltage on i 2 c_sda output v i2c_ol - - 0.4 v current load when i 2 c_sda outputs low voltage i i2c_ol 0 - 4.0 ma leakage current on i 2 c_sda, i 2 c_scl outputs i i2c_leak -1.0 - 1.0 a input capacitance of the i 2 c_sda, i 2 c_scl pins c i2cin - - 8.0 pf notes 1. the out pin discharge mosfet is shown in figure 15 . this mosfet will be turned on when the power mosfet is off. table 3. static electrical characteristics (continued) characteristics noted under conditions v dd = 3.6 v, v bus = 5.0 v, v ddio = 3.0 v, -40c t a 85c (see figure 1 ), unless otherwise noted. typical values noted refl ect the approximate par ameter means at v dd = 3.6 v and t a = 25c under nominal conditions, unless otherwise noted. characteristic symbol min typ max unit
analog integrated circuit device data freescale semiconductor 9 34825 electrical characteristics dynamic electrical characteristics dynamic electrical characteristics table 4. dynamic electri cal characteristics characteristics noted under conditions v dd = 3.6 v, v bus = 5.0 v, v ddio = 3.0 v, -40c t a 85c (see figure 1 ), unless otherwise noted. typical values noted re flect the approximate parameter means at v dd = 3.6 v and t a = 25c under nominal conditions, unless otherwise noted. characteristic symbol min typ max unit power on and off delay vdd power-on-reset timing vdd rising deglitch time vdd falling deglitch time t d2 t vdddgt_f 7.0 1.7 8.5 2.5 10.2 3.5 ms vbus detection deglitch time (for both rising and falling edges) (4) t vbus_det 3.5 4.5 5.7 ms vbus over-voltage protection protection delay (2) (4) falling-edge deglitch time (3) t ovpd t ovpdgt_f - - - 25 2.0 - s vbus over-temperature protection mosfet turning off speed when otp occurs (4) deglitch time t otp_to t otp_dgt - - - 15 0.5 - a/ s s oscillator oscillation frequency f osc 85 100 112 khz switching delay id detection delay time after vbus applied (default value is td = 0100) td = 0000 td = 0001 td = 0010 td = 0011 td = 0100 ...... td = 1111 t d - - - - - ...... - 100 200 300 400 500 ...... 1600 - - - - - ...... - ms id detection id float detection deglitch time t id_float - 20 - ms id shorted to ground detection time (the detection current source on time) t vcbl - 20 - ms adc adc conversion time t conv - 1.0 - ms remote control key press comparator debounce time t rmtcon_dg - 20 - ms reset timing device reset time t rstdvc - 10 - s vddio logic input timing rising edge deglitch time falling edge deglitch time t vddiodgt_r t vddiodgt_f 660 105 875 125 1130 150 s vddio reset timing vddio reset pulse width t rstvddio 150 - - s
analog integrated circuit device data 10 freescale semiconductor 34825 electrical characteristics dynamic electrical characteristics i 2 c reset timing i 2 c reset pulse width i 2 c_sda/i 2 c_scl concurrent low time without causing a reset t rsti2c t nrsti2c 13.5 - - - - 8.8 ms i 2 c interface (4) scl clock frequency f scl - - 400 khz bus free time between a stop and start condition t buf 1.3 - - s hold time repeated start condition t hd:sta 0.6 - - s low period of scl clock t low 1.3 - - s high period of scl clock t high 0.6 - - s setup time for a repeated start condition t su:sta 0.6 - - s data hold time t hd:dat 0 - - s data setup time t su:dat 100 - - ns rising time of both sda and scl signals t r 20+0.1c b - - ns falling time of both sda and scl signals t f 20+0.1c b - - ns setup time for stop condition t su:sto 0.6 - - s input deglitch time (for both rising and falling edges) t dgt 55 - 300 ns notes 2. the protection delay is defined as the interval between vbus voltage rising above th e ovp rising threshold, and the out pin v oltage dropping below the ovp rising threshold voltage for a vbus ramp rate of >1.0 v/ s. 3. the ovp deglitch timer is only for the falling edge threshold. 4. these parameters are not tested. they are guaranteed by design. table 4. dynamic elec trical characteristics characteristics noted under conditions v dd = 3.6 v, v bus = 5.0 v, v ddio = 3.0 v, -40c t a 85c (see figure 1 ), unless otherwise noted. typical values noted refl ect the approximate par ameter means at v dd = 3.6 v and t a = 25c under nominal conditions, unless otherwise noted. characteristic symbol min typ max unit
analog integrated circuit device data freescale semiconductor 11 34825 electrical characteristics electrical performance curves electrical per formance curves figure 4. spk switch on resistance vs input voltage figure 5. usb switch on resistance vs input voltage figure 6. uart switch on resistance vs input voltage figure 7. mic switch on resistance vs input voltage figure 8. vdd supply current vs supply voltage in standby mode figure 9. vdd supply current vs temperature in standby mode -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 1.4 1.6 1.8 2.0 2.2 temperature =85 c temperature =25 c temperature = -40 c spk switch on-resistance ( ) input voltage ( v ) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 2.0 2.5 3.0 3.5 4.0 4.5 temperature = 85 c temperature = 25 c temperature = -40 c usb switch on-resistance ( ) input voltage ( v ) 0.00.51.01.52.02.53.03.5 20 25 30 35 40 45 temperature = 85 c temperature = 25 c temperature = -40 c uart switch on-resistance ( ) input voltage ( v ) 1.8 1.9 2.0 2.1 2.2 2.3 40 50 60 70 80 90 temperature = 85 c temperature = 25 c mic switch on-resistance ( ) input voltage ( v ) temperature = -40 c 2.53.03.54.04.55.05.5 8.6 8.8 9.0 9.2 9.4 9.6 vdd supply current ( a ) vdd voltage ( v ) -40-20 0 20406080 7 8 9 10 11 vdd current ( a ) temperature ( c )
analog integrated circuit device data 12 freescale semiconductor 34825 electrical characteristics electrical performance curves figure 10. vbus supply current vs temperature in vbus power mode figure 11. out voltage vs vbus voltage -40-20 0 20406080 760 780 800 820 840 860 880 900 vbus supply current ( a ) temperature ( c ) 0.0 1.5 3.0 4.5 6.0 7.5 9.0 0.0 1.5 3.0 4.5 6.0 7.5 9.0 out voltage (v) vbus voltage ( v )
analog integrated circuit device data freescale semiconductor 13 34825 functional description introduction functional description introduction the 34825 is designed to support cell phones that adopt the micro or mini-usb connector as the sole wired interface between the cell phone and external accessories. using the micro-usb connector for charging and usb data communication is required by the omtp standard for the ucs. the 34825 further extends the micro-usb connector to support other accessories to eliminate all other mechanical connectors in a cell phone. the supported accessories include various audio headsets, uart connection, r/d test cables for firmware downloading, and other user defined accessories, in addition to the chargers defined in the battery charging specification, revision 1.0, from the usb implementer?s forum and the cea-936-a usb carkit specification, from the consumer electronics association (cea). the supported ch argers are listed in table 7 . the 34825 offers two mechanisms to assist the identification of the accessory. the id detection mechanism allows the cell phone to measure the id resistor value between the id pin and the ground with a 5-bit adc. the vbus detection mechanism allows the cell phone to find out the connection status between th e d+ and d- pins. together, the exact accessory can be determined. a detection flow is initiated by a change in the vbus pin voltage or by a change in the id pin floating status. detaching the accessory from the micro or mini-usb connector causes the vbus voltage or/ and the id resistance to change. the identification flow will be initiated to confirm if an accessory is still connected. the host can also initiate the identificat ion flow by resetting an active bit in the register from 1 to 0. upon the completion of the identification flow, an interrupt signal is sent to the host ic, so the host ic can take further actions. the 34825 contains swit ches that the host ic can control via an i 2 c interface. based on the accessory, the host ic can configure the switch conn ections in the 34825, so that the signal paths for the usb communication, or the uart communication, or audio acce ssories can be established between the micro or mini-usb connector pins and the system ics. if the accessory is a power supply , the supplied voltage is switched to the li-i on battery charging function in the cell phone via an internal power mosfet. the host ic controls the 34825 via the i 2 c serial bus. the register map in the 34825 contains status information of the device and the control bits that the host ic can access to control the 34825. functional pin description speaker right channel (spk_r) right channel of the baseband speaker output. speaker left channel (spk_l) left channel of the baseband speaker output. microphone output (mic) microphone output to the baseband. d+ of the usb transceiver (d+) d+ line of the usb transceiver. d- of the usb transceiver (d-) d- line of the usb transceiver. uart receiver (rxd) receiver line of the uart. uart transmitter (txd) transmitter line of the uart. no connect (nc) these pins are not used in application. freescale recommends that these pins be floated io power supply (vddio) power supply input for the logic io interface. generally the io power supply voltage should be the same as the io voltage used in the cell phone system. vddio is also one of the hardware reset input sources. a falling edge at this pin will reset the 34825. see reset for more information. power supply (vdd) power supply input. bypass to ground with a 1.0 f capacitor. interrupt output ( int ) active low open-drain output. the int pin sends an interrupt signal to the host ic when an interrupt event happens. the int output returns to high voltage once all interrupt bits are read. data line of the i 2 c interface (i 2 c_sda) data line of the i 2 c interface. i 2 c clock (i 2 c_scl) clock line of the i 2 c interface. the i 2 c_scl input together with the i 2 c_sda input forms one of the hardware reset input sources.
analog integrated circuit device data 14 freescale semiconductor 34825 functional description functional pin description power output (out) output of the power mosfet in the 34825. this pin is connected to a charger input. bypass to ground with a 1.0 f capacitor. charge current setting ( iset ) open-drain output to set the charge current according to the power supply current capability. vbus power supply (vbus) usb vbus input. bypass this pin to ground with a less than 10 nf capacitor. when the accessory is an audio kit, this pin is the microphone input to the 34825. d- of the usb connector (dm) d- line of the mini or micro-usb connector. d+ of the usb connector (dp) d+ line of the mini or micro-usb connector. id of the usb connector (id) id pin of the mini or micro-usb connector. ground (gnd) ground.
analog integrated circuit device data freescale semiconductor 15 34825 functional description functional internal block description functional internal block description figure 12. 34825 functional internal block diagram internal power supplies this block contains the bias power supplies to the internal circuits. the inputs to this block include vbus, vdd and vddio. logic and state machine this block includes the state machine for accessory detection and identification, the register map, and other logic circuits. i 2 c interface the i 2 c interface block has the circuit for the i 2 c communication that a master device can use to access the registers in the 34825. the 34825 is a slave device. logic output the logic output includes two open-drain logic output signals, int and iset . switch array the switch array consists of analog switches for uart, usb, audio signal switching and one high-voltage power mosfet for power switching. vbus detection this block detects whether the power supply at vbus pin is present or removed. id detection this block contains a circuit to detect whether an id resistor is connected to the id pin or not. id adc an internal 5-bit adc measures the resistance at the id pin. the result is stored in the adc result register and sent to the logic and state machine block to determine what accessory is attached. switch array i 2 c interface vbus detection logic output internal power supplies logic & state machine id adc id detection
analog integrated circuit device data 16 freescale semiconductor 34825 functional device operation operational modes functional device operation operational modes the 34825 has five operational modes: power down mode, vbus power mode, standby mode, active mode, and power save mode. the mode transition diagram is given in figure 13 . figure 13. mode transition diagram power down mode the power down mode is when neither the vdd pin nor the vbus pin is powered. in this mode, the ic does not respond to any accessory attachment except for a power supply. when an external power supply is plugged into the mini or micro-usb connector, the 34825 enters the vbus power mode. vbus power mode the 34825 enters the vbus power mode when the vbus pin is powered but the vdd pin is not. in the vbus power mode, the internal power mosfet is turned on to power the charging function in the cell phone. the iset pin outputs high-impedance in this mode. standby mode the standby mode is when the vdd voltage is higher than the por (power-on-reset) threshold and no accessory is attached. in this mode, only th e id detection circuit, the i 2 c interface, and the internal regi sters are powered in order to minimize the quiescent current from the vdd pin. the id detection circuit samples the st atus of the id line every 50 ms. if detecting an attachment of an accessory, the 34825 moves to the active mode for fu rther accessory identification. active mode the active mode starts when an accessory is plugged into the mini or micro-usb connector while the vdd pin is powered. the 34825 identifies the accessory and interrupts the host ic for further actions. different functions will be enabled according to the identification result, so the quiescent current in active m ode is dependent on the type of accessories. the operational mode can be changed from active to standby either by an accessory detachment or by resetting the active bit to 0 through an i 2 c programming operation. power save mode the power save mode can be enabled only for accessories with a remote controller (refer to table 21 ). the 34825 enters into the power save mode to minimize the operating current while such an accessory is attached, but not in operation. for example, if the cell phone is not in an audio playback mode when a headset is attached, the host ic can force the 34825 to the power save mode via the i 2 c programming. the 34825 can al so automatically enter into the power save mode when no activity is detected on the spk_r or spk_l pins in 10 seco nds. the vdd current in the power save mode is slightly higher than the current in the standby mode. the 34825 can exit the power save mode by an i 2 c programming or will exit the mode automatically when v dd > v vddpor active v dd < v vddpor id det or vbus det v dd < v vddpor standby i 2 c resets active bit or detachment of accessory power down vbus power v dd > v vddpor vbus power up vbus power down power save i 2 c or detection of no activity i 2 c or detection of the activity detachment of accessory
analog integrated circuit device data freescale semiconductor 17 34825 functional device operation power-up detecting audio signal activities or an accessory detachment. if the transition is caused by an accessory detachment, the 34825 moves from the power save mode to the standby mode directly. otherwise, it moves to the active mode, and the configuration of the ic resu mes to the same configuration before entering the power save mode. device mode register the psave bit, active bit and rst bit in the device mode register (refer to table 9 ) hold the information of the device operational mode. the rs t bit, which is of r/c (read and clear) type, indicates whether a reset has occurred. the rst bit is set when a reset occurs (refer to reset for more information). the rst bit is cleared when read by an i 2 c access. the active bit and the psave bit together indicate the device mode by the relationship shown in table 5 . when the device is in the vbus power mode, the registers are not powered up. the active bit is a r/w (read and write) bit, it can be written by an i 2 c operation. when the host ic writes ?0? to the active bit, the device will be forced to the standby mode. if an accessory is attached when the acitve is set to 0, the accessory identifica tion flow shown in figure 14 will be re- started. the psave bit is also a r/w bit. when the 34825 is configured to the auto power-save mode (autopsave bit is set to 1), the psave bit indicates whether the 34825 is in the power save mode or not. when the 34825 is configured to the manual power-sa ve mode (autopsave bit set to 0), the host ic can writes ?1? to t he psave bit to force the 34825 into the power save mode when an audio r/c accessory is attached. for all other accessories attachment, the 34825 does not enter the power save mode even the psave bit is set to 1. power-up the 34825 has four possible power-up scenarios depending on which of the vdd pin and the vbus pin is powered up first. the four scenarios correspond to the following four mode transitions. 1. from power down to vbus power: the vbus pin is powered up when v dd < v vddpor (vdd por threshold) 2. from vbus power to standby: vbus is already powered when the vdd voltage rises above its por threshold 3. from power down to standby: the vdd pin is powered up when v bus < v vbuspor (vbus por threshold) 4. from standby to active: the vdd pin is already powered when the vbus voltage rises above its por threshold scenario 1: vdd = 0 v and vbus is powered up (power down mode to vbus power mode transition) if the vdd pin is not powered but the vbus is powered up within a voltage range between the por threshold and the ovp (over-voltage protection) th reshold, the internal power mosfet is softly turned on. the ic is in the vbus power mode. in this vbus power mode, the iset outputs high- impedance and all registers are in the reset state. the power mosfet remains on unless it is disabled by the over-voltage protection or the over-tem perature protection block. scenario 2: vbus = high and vdd is powered up (vbus power mode to standby mode transition) if the vbus pin is already powered when the vdd pin is powered up, the device moves from the vbus power mode to the standby mode and then quickly moves to the identification flow of the ac tive mode to identify the accessory, as shown in figure 14 . after the vdd pin is power ed up, the 34825 starts up the internal supplies. the por resets all register bits. the power mosfet remains on during the reset process. scenario 3: vbus = 0 v and vdd is powered up (power down mode to standby mode transition) if no accessory is plugged into the micro or mini-usb connector when vdd is powered up, the 34825 moves from the power down mode to the standby mode. the internal supplies are started up first, and then the whole chip is reset and is ready to accept accessories. then when an accessory is attached, the 34825 enters the active mode. the power mosfet is off in this case since vbus = 0 v. scenario 4: vdd = high and vbus is powered up (standby to active mode transition) this is a normal vbus detection case as shown in figure 14 . more description can be found in power supply type identification . table 5. the device modes vs. the register bits psave active mode 0 0 standby 0 1 active 1 1 power save 1 0 undefined
analog integrated circuit device data 18 freescale semiconductor 34825 functional device operation accessory identification accessory identification accessories are categorized into two groups. powered accessories are accessories t hat supply power to the vbus pin while non-powered accessories do not. when the accessory is a powered one, the vbus-detection mechanism will check the connection between the d+ and the d- pins as part of the power supply type identification (psti). a powered accessory may or may not have an id resistor. a non- powered accessory must have an id resistor for the identification purpose. accessories that have an id resistor are grouped into three types, as listed in table 21 . 1. test accessories. such accessories include two usb test cables that are powered accessories, and two uart test cables that are non-powered accessories. a test accessory has an id resi stor and four id resistor values are reserved for them (see table 21 for the id resistor assignment). the usb or the uart switches in the ic will be turned on automatically when a test accessory is attached. 2. accessories with a remote controller. two accessories are offered to support remote control (rc) keys. the id resistor values are 619 k and 1.0 m respectively, as given in table 21 . such accessories are non-powered accessories. the 34825 monitors the id pin continuously for key pressing when such an accessory is connected. 13 id resistors are assigned to the remote control keys, as listed in table 21 . 3. other accessories. the rema ining id resistor values are reserved for users to assign to their own accessories. the identification flow chart is shown in figure 14 . in the standby mode, the 34825 monitors both the id pin and the vbus pin simultaneously. if an accessory is detected, the identification state machine will find out in parallel the id resistor value and the type of the power supply (if a powered accessory is attached). when th e 34825 is in the active mode with the active bit = 1, the host ic can force the active bit to 0 via the i 2 c bus to initiate the ident ification state machine. the details on the identif ication flow for the vbus- detection mechanism and the id detection mechanism are described as following.
analog integrated circuit device data freescale semiconductor 19 34825 functional device operation accessory identification figure 14. detailed accessory identification flow diagram id detection the id detection relies on the resistance between the id pin and the ground (r id ) inside the accessory for the accessory detection and recognition. the nominal id resistance that the 34825 supports is listed in table 6 as well as in table 21 . the 34825 offers a 5-bit adc for the resistance recognition and the corresponding adc results vs. the r id are also listed in table 6 . the resistors are required to have 1% or better accuracy for the adc to recognize successfully. a comparator monitors the id pin for attachment and detachment detection. when no accessory is attached, the id pin is floating. an id_float bit in the status register stays in the value of 1. when a resistor less than or equal to 1.0 m is connected between the id line and the ground, the id_float bit changes to 0. when the resistor is removed, id_float bit returns to 1. a falling-edge of the id_float bit represents the attachment of the accessory and the adc is enabled to measure the id resistance. the adc result register has the identification result of the r id , as given in table 6 . a rising edge of the id_float bit represents the detachment of the accessory. the adc results are broken into two groups. the values between ?00001? to ?01101? are assigned to 13 remote-control keys for the two accessories that support remote controllers, as listed in table 21 . the rest of the adc results are assigned to various accessories. if the adc result is one of the remote control key values in the identification flow, it is possible that the remote co ntrol key is stuck when the accessory is attached. a special stuck key identification flow is designed to resolve such an issue. as shown in the figure 14 , if the stuck key is recognized but is released within 1.5s, the identification flow will return to re-detect the id line; otherwise, the attach bit will be set and the adc result register has the key result. after the key is released, the 34825 will detect the id resistance value again. if the accessory is still connected, the attach bit is set again and the adc result has the id resistor value of the accessory. no yes dp->dm short? no yes set usb_chg bit id_float =1? vbus applied? set dp/dm _short bit set vbus_det bit no yes no key released within 1.5s? yes id float? no set detach bit key released? no yes set adc result yes no adc = key value? adc = 1000x? adc = 0111x? no yes yes no no set attach bit set attach bit set id_float bit vbus=0v active = 0 yes no id float? clear id_float bit id float yes delay td time yes set active bit adc = 00000? id shorted to gnd? vbus_det =1? set id_gnd bit yes yes no no dm->dp short? yes no turn on usb switches turn on uart switches
analog integrated circuit device data 20 freescale semiconductor 34825 functional device operation accessory identification when the adc result is 00000, the resistance between the id pin and the ground is less than 1.90 k . the id_gnd bit in the status register indicates whether the id pin is shorted to ground or not. if the id pin is shorted to ground with less than 30 of resistance, the id_g nd pin is set to ?1?. power supply type identification the 34825 supports various standard power supplies for charging the battery. the power supplies supported include those that are user defined, and the ones defined in the battery charging specification, revision 1.0, from the usb implementer?s forum and the cea-936-a usb carkit specification , from the consumer electronics association. the five types of power supp lies specified in the afore mentioned two specification documents are listed in table 7 . the power supply type identif ication (psti) function is offered to assist the identificat ion of the power supply type. the psti state machine checks the connection status between the dp and the dm pins. the state machine starts when the vbus pin voltage rises above the vbus detection threshold, which is indicated with an vbus_det bit in the status register. the state machine will find out if the dp and dm pins are shorted, indica ted with the dp/dm_short bit, or the connection has the characteristics of a usb charger, indicated with the usb_chg bit. together with the id detection result, the power supply type can be determined. the conditions for reaching the conclusion of the five supported power supplies are listed in table 7 . table 6. adc output vs. resistor values (unit: k ) adc result r id (k ) adc result r id (k ) adc result r id (k ) adc result r id (k ) 00000 (1) 01000 10.03 10000 40.2 11000 255 00001 2.00 01001 12.03 10001 49.9 11001 301 00010 2.604 01010 14.46 10010 64.9 11010 365 00011 3.208 01011 17.26 10011 80.6 11011 442 00100 4.014 01100 20.5 10100 102 11100 523 00101 4.820 01101 24.07 10101 121 11101 619 00110 6.03 01110 28.7 10110 150 11110 1000 00111 8.03 01111 34.0 10111 200 11111 (2) notes 1. if the id resistance is below 1.90 k (nominal value), the adc result is set to 00000. 2. if the id line is floating, the adc result is set to 11111 table 7. power supply type vs. detection result item # vbus_det dp/dm_short usb_chg id_float adc result accessory type 1 1 0 0 1 11111 standard usb port 2 1 0 1 1 11111 usb charger 3 1 1 0 1 11111 dedicated charger 4 1 1 0 0 10111 carkit charger type 1 5 1 1 0 0 11011 carkit charger type 2
analog integrated circuit device data freescale semiconductor 21 34825 functional device operation operation after identification operation after identification the operation after the identification is dependent on the vddio voltage. the vdd voltage has to be higher than its por threshold for the 34825 to perform the identification state machine. once completed, the identification results are stored in the status and the adc result registers and the attach bit is set. if the vddio is not powered, the interrupt signal from the int pin cannot be sent because the int pin is normally pulled up to the vddio. the host cannot access the 34825 either via the i 2 c bus. hence, no communication will occur between the 34825 and the host ic when the vddio is not powered. the int signal will send an interrupt signal if the vddio is powered and the attach bit is not masked by the attach_m bit (refer to interrupt on page 25 for more details). if the attach bit is masked while the vddio is powered, the interrupt signal will not be sent but the host ic can still access the re gister map via the i 2 c bus. once the host ic accesses the 34825 regi ster map and determines the accessory type, it can manage the analog switches and other signals in the 34825 by program ming the s/w control 1 and s/w control 2 registers. the switches are open by default except if the attached accessory is one of the four test cables listed in table 21 . more descriptions on the analog switches and the operation of the 34825 are given in the following sections. analog switches signal switch array the 34825 offers an array of analog switches for signal switching, as shown in figure 15 . two pairs of switches (usb and uart) are for switching the uart and usb signals to the micro or mini-usb connector. stereo audio signals can be switched from the spk_l a nd the spk_r inputs to the dp and the dm pins that are wired to the usb connector. both the spk_l and the sp k_r inputs are c apable of passing signals of +/-1.5 v, referencing to the gnd pin voltage. the spk_l and the spk_r pins are pulled down to ground via a 100 k resistor respectively, as shown in figure 15 . a microphone switch connects the mic pin to the vbus pin. all switches are controlled by bits in the s/w control 1 and 2 registers except when the a ccessory attached is a test cable. figure 15. analog and digital switches power mosfet the sw8 in figure 15 is a power mosfet that controls the power flow from the vbus input to the out pin. the power mosfet serves two purposes. for the audio accessory with microphone, the power mosfet isolates the spk_r spk_l mic dp dm vbus rxd txd d+ d- sw2 sw1 sw3 sw4 sw6 sw7 sw5 out sw8 sw9 sw10 iset gate drive
analog integrated circuit device data 22 freescale semiconductor 34825 functional device operation operation after identification vbus pin from both the input decoupling capacitor and the input quiescent current of the charger ic connected to the out pin, so that the microphone signal can be connected to the vbus pin without any interference from the out pin. the power mosfet is also used as the input over-voltage protection (ovp) or over-current protection (ocp) switch for other components in the cell pho ne, such as the charger ic, to allow a low voltage rated charger ic to be used for cost reduction. the power mosfet is guaranteed to be turned on in vbus power mode even when the vdd voltage is below v vddpor threshold, to ensure that the cell phone battery can be charged when the battery is fully discharged. protection over-voltage protection (ovp) the vbus line is capable of withstanding a 28 v voltage. the 34825 protects the cell phone by turning off the internal power mosfet when the vbus voltage is higher than the ovp threshold. in this case , the 34825 turns off the power mosfet within 1.0 s after the input voltage exceeds the ovp threshold, and the ovp_en bit in the interrupt register is set to interrupt the host ic. when the ovp event is cleared, the ovp_otp_dis bit in the interrupt register is set to inform the host ic. over-current protection (ocp) and over- temperature protection (otp) if the current flowing throug h the power mosfet exceeds the specified ocp limit, t he 34825 will operate in cc (constant current) mode, regulatin g the output current at the ocp limit. if the ocp condition persists, the ic temperature will rise, eventually reaching the over-temperature- protection (otp) limit. the 34825 then turns off the power mosfet and sets the otp_en interrupt bi t in the interrupt register to inform the host ic. the power mosfet is turned on again when the ic temperature falls below the otp falling temperature threshold, and the ovp_otp_dis bit is set. if the above case happens repeatedly 7 times, the power mosfet will be permanently turned off until the accessory is detached or the ic is reset. the power mosfet is turned off with a limited speed under the otp case to prevent a high overshoot voltage at the vbus pin. operation with accessories audio accessory su pporting remote controller (r/c accessory) two id resistors are designated for accessories with a remote controller, as listed in table 21 . a typical accessory with a remote controller is an au dio headset that has a stereo speaker, a micro phone, and a re mote controller, as shown in figure 16 . the five pins in the mini or micro-usb connector are assigned in figure 16 . if some components are not included in the accessory, the corresponding pins should be left floating. for example, if the microphone is not included in the stereo headset, vbus pin should be left floating in the headset. the timing of the key pressing is shown in figure 17 . if a key is pressed for a time less than 20 ms, the 34825 ignores this key press. if the key is still pressed after 20 ms, 34825 starts a timer to count the time during which the key is pressed. there are three kinds of key press conditions according to the pressing time : error key press, short key press, and long key press. 1. error key press: if the ke y pressing time is less than t kp , the 34825 ignores this key press. 2. short key press: if the key pressing time is between t kp and t lkp , the kp bit is set to inform the host ic. the adc result holds the key value. the int outputs low impedance when the key is released and returns to a high impedance, due to the clearance of the kp bit when the interrupt register is read. 3. long key press: if the key pressing time is longer than t lkp , the long key press bit lkp in the interrupt register is set to inform the host ic. the host ic needs to respond to the key press immediately. the adc result holds the key value. when the key is released, the long key release bit lkr in the in terrupt register is set to interrupt the host ic again. the adc result register still has the key value. when such a accessory is attached, the 34825 can either be forced into the power save mode or automatically enter into the power save mode. this is controlled by the autopsave bit in the control register. when autopsave = 1, if no activity is detected at the spk_l and spk_r pins in 10 seconds, the 34825 enters the power save mode automaticall y to minimize the quiescent current. upon detecting the activity in audio signal switches, the 34825 returns to the acti ve mode. when autopsave = 0, the host ic can control the mode of 34825 manually by setting the psave bit in the de vice mode register via i 2 c. in the power save mode, the key pressing is monitored as well.
analog integrated circuit device data freescale semiconductor 23 34825 functional device operation operation after identification figure 16. audio accessory with remote control and microphone figure 17. the remote control key pressing timing test accessory the test accessories listed in table 21 are special usb cables and uart cables for test and r/d purpose. it has an id resistance to differentiate it from a regular usb cable or uart cable. the test accesso ry has four id resistance values to distinguish the test cable type. the detection result turns on or off the usb switches, uart switches, and the power mosfet automatically, as shown in the table 8 . mic vbus ?... r 1 r 2 r 3 r n-1 r n hold audio_r audio_l d+ d- id gnd audio accessory send / end / 20 ms key press 20 ms t kp t lkp kp int lkp lkr int adc time interrupt register read interrupt register read interrupt register read 20 ms table 8. switch status vs. test cables accessory type adc result auto-on switches power mosfet uart test cable type 1 01110 uart switches off uart test cable type 2 01111 uart switches off usb test cable type 1 10000 usb switches on usb test cable type 2 10001 usb switches on other accessories others no auto-on switches no auto-on switches
analog integrated circuit device data 24 freescale semiconductor 34825 functional device operation logic control features usb host (pc or hub) when the attached accessory is a usb host or hub, the id pin is floating. the power mosfet is turned on to allow the charger to charge the battery. the iset outputs default high impedance to limit the charging current to a lower level. the host ic can turn on the d+ and d- switches and then pull the d+ signal to high to start the usb attaching sequence. usb charger or dedicated charger when the attached accessory is a usb charger or a dedicated charger, the 34825 turns on the power mosfet to allow the charger to start. the host ic can set the iset outputs low impedance to allow a higher charge current. 5-wire carkit charger (type 1 or type 2) a 5-wire carkit charger is a charger specified in the cea- 936-a usb carkit specification . the 5-wire carkit charger outputs 5v to the vbus pin, has the d+ and d- pins shorted internally, and has an id resistor. the id resistor has a value of either 200k or 440k to distinguish the current capability of the charger. refer to the cea-936-a usb carkit specification for more information. when the attached accessory is a 5-wire carkit charger, the 34825 turns on the power mosfet to allow the li-ion battery charging function to start. the host can set the iset outputting high impedance or low impedance to choose the charge current. reserved accessory the users can assign the reserved id resistor values listed in table 21 to their user specific accessories. when a user specific accessory is attached, the identification flow will identify the id resistance and as well as the power supply type in case of a powered accessory. the adc result register and the status register contain t he information of the r id value and the power supply type. the baseband can read these registers to distinguish the type of the accessory for further actions. detaching detection when either the vbus voltage drops below the vbus power detection threshold or the id resistor is removed, a detaching detection flow starts. figure 18 shows the detailed detection flow. when the detach bit is set, the int outputs low voltage to inform the host ic. at the end of the detaching detection flow, the active bit is cleared and the 34825 enters the standby mode. a new identification flow will start if either the vbus voltage is above its por threshold or the id resistor is connected. figure 18. the detachment detection flow logic control features reset hardware reset the 34825 has three sources for hardware resetting the ic. as the figure 19 shows, the sources include the power- on-reset caused by the rising vdd, a hardware reset caused by the vddio input and a hardware reset using the i 2 c bus lines. the power-on-reset is described earlier. the vbus removed clear vbus_det bit clear attach bit set id_float bit id float no yes set detach bit clear active bit vbus=5v rid connected yes no
analog integrated circuit device data freescale semiconductor 25 34825 functional device operation logic control features reset caused by the vddio input or by the i 2 c bus lines belongs to system resets. the hardware reset condition using the i 2 c signals is shown in figure 20 . when both the i 2 c_scl and the i 2 c_sda have a negative pulse with time of t rsti2c , a hardware reset is generated. the result of the reset is same as a power-on-reset. the operating waveforms of the hardware reset using the vddio pin are shown in figure 21 . the vddio detection has a deglitch-time t vddiodgt_f . a glitch on the vddio with duration less than the deglitch time will be ignored. if the pulse on the vddio lasts longer than the deglitch time, a reset from the vddio is detect ed to generate a reset signal. to effectively reset the 34825, the reset pulse from the vddio needs be longer than the 150 s minimum reset pulse width given in the dynamic electrical characteristics table. software reset in addition to the two hardware reset types, the system reset has another reset source, the software reset by writing ?1? to the reset bit in the control register. the reset bit will be cleared to ?0? at once since it is of w/c type. the consequence of the software reset is the same as the hardware reset. all re gisters will be reset. figure 19. sources of reset in 34825 figure 20. hardware reset using the i 2 c bus figure 21. hardware reset using the vddio input interrupt there are eight interrupt sources in the 34825 causing an interrupt at the int pin to the host ic. they are accessory attachment, accessory detachment, short-key press, long key press, long-pressed key release, vbus voltage ovp, the ic temperature otp, and either the ovp or the otp condition is removed. the 34825 detects each event and sets reset + - v vddpor vdd i 2 c_sda i 2 c-bus reset detection delay time i 2 c_scl vddio vddio reset detection i2c_sda i2c_scl reset condition start condition stop condition reset 8.8~13.5ms vddio reset t vddiodgt_f
analog integrated circuit device data 26 freescale semiconductor 34825 functional device operation i2c serial bus interface the corresponding bit in the interrupt register. as long as the interrupt register is set, the int pin outputs low voltage. the interrupt register is not writable. when the interrupt register is read, the interrupt register is cleared automatically. once the interrupt register is cleared, the int pin returns to high voltage. an interrupt mask register is provided to mask unwanted interrupt source. when the bit of the interrupt mask register is set to 1, the corresponding interrupt source is blocked. the int does not output low voltage even though this interrupt bit is set in the interrupt register. logic output there are two open-drain logic output pins, int and iset . the int pin is related to the interrupt sources as described in the interrupt section. the iset pin is controlled by the register bit with the same na me in the control register. the iset generally is used to control the charge current level. a typical charger ic uses one external resistor to set the charge current. by using iset output, the charger ic can use two external resistors in parallel to set two charge current levels, as shown in figure 27 . i 2 c serial bus interface the i 2 c bus is enabled in the standby, the power save, and the active modes. the serial clock (scl) and the serial data (sda) lines must be connected to a positive supply using pull-up resistors. internally the i 2 c bus voltage is referenced to the vddio input. the 34825 is a slave device. maximum data rate is 400 kbps. addressing and protocol the 7-bit address for the 34825 is 0100101, as shown in figure 22 . figure 22. i 2 c slave address the following three figures show three i 2 c-bus transaction protocols. the word address is an 8-bit register address in the 34825. figure 23. master transmits to slave (write mode) 0 1 0 0 101 r/w
analog integrated circuit device data freescale semiconductor 27 34825 functional device operation register map figure 24. master reads after setting word address (write word address and then read data) figure 25. master reads slave immedi ately after first byte (read mode) register map table 9. register map addr register type reset value bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 83h interrupt r/c 00000000 ovp_otp_dis otp_en ovp_en lkr lkp kp detach attach 85h interrupt mask r/w 00000000 ovp_otp_dis_m otp_en_m ovp_en_m lkr_m lkp_m kp_m detach_m attach_m 87h adc result r 00011111 reserved reserved reserved adc value 88h timing set r/w 00000000 key press long key press 93h s/w control 1 r/w 00000001 reserved dp/dm switching vbus switching 94h s/w control 2 r/w 00000100 reserved reserved reserved isetb reserved reserved reserved a0h status r 0x000xxx reserved fet_status usb_chg dp/dm_short id_gnd id_float vbus_det adc_status a1h control r/w 011000x0 reserved reserved autopsave reserved reserved reset reserved reserved a2h time delay r/w 10010100 reserved reserved reserved reserved td a3h device mode r/w 00000001 reserved reserved reserved reserved reserved psave active rst table 10. interrupt register bit mode symbol reset description notes 0 r/c attach 0 1: accessory attached
analog integrated circuit device data 28 freescale semiconductor 34825 functional device operation register map 1 r/c detach 0 1: accessory detached 2 r/c kp 0 1: remote controller short key is pressed 3 r/c lkp 0 1: remote controller long key is pressed 4 r/c lkr 0 1: remote controller long key is released 5 r/c ovp_en 0 1: vbus voltage higher than the ovp threshold 6 r/c otp_en 0 1: the temperature of 34825 is above the otp threshold 7 r/c ovp_otp_dis 0 1: ovp or otp event is removed table 11. interrupt mask register bit mode symbol reset description notes 0 r/w attach_m 0 1: interrupt disabled 1 r/w detach_m 0 1: interrupt disabled 2 r/w kp_m 0 1: interrupt disabled 3 r/w lkp_m 0 1: interrupt disabled 4 r/w lkr_m 0 1: interrupt disabled 5 r/w ovp_en_m 0 1: interrupt disabled 6 r/w otp_en_m 0 1: interrupt disabled 7 r/w ovp_otp_dis_m 0 1: interrupt disabled table 12. adc result register bit mode symbol reset description notes 4-0 r adc result 11111 adc result of the id resistor 7-5 r reserved 000 table 13. timing set register bit mode symbol reset description notes 3-0 r/w long key press 0000 long key press duration 0000: 300 ms 0001: 400 ms 0010: 500 ms ...... 7-4 r/w key press 0000 normal key press duration 0000: 100 ms 0001: 200 ms 0010: 300 ms ...... table 14. timing table setting value key press long key press 0000 100 ms 300 ms 0001 200 ms 400 ms 0010 300 ms 500 ms table 10. interrupt register bit mode symbol reset description notes
analog integrated circuit device data freescale semiconductor 29 34825 functional device operation register map 0011 400 ms 600 ms 0100 500 ms 700 ms 0101 600 ms 800 ms 0110 700 ms 900 ms 0111 800 ms 1000 ms 1000 900 ms 1100 ms 1001 1000 ms 1200 ms 1010 - 1300 ms 1011 - 1400 ms 1100 - 1500 ms 1101 - - 1110 - - 1111 - - table 14. timing table setting value key press long key press
analog integrated circuit device data 30 freescale semiconductor 34825 functional device operation register map table 15. s/w control register 1 bit mode symbol reset description notes 1-0 r/w vbus switching 01 vbus line switching configuration 00: open all switches connected to the vbus line. 01: internal power mosfet on 10: vbus connected to mic 11: open all switches connected to the vbus line. 4-2 r/w dp/dm switching 000 dp/dm line switching configuration 000: open all switches 001: dp connected to d+, dm connected to d- 010: dp connected to spk_r, dm connected to spk_l 011: dp connected to rxd, dm connected to txd others: open all switches connected to the dp pin and dm pin 7-5 r reserved 000 table 16. s/w control register 2 bit mode symbol reset description notes 3-0 r/w reserved 0100 4 r/w isetb 0 iset output 0: high-impedance 1: low-impedance 7-5 r/w reserved 000
analog integrated circuit device data freescale semiconductor 31 34825 functional device operation register map table 17. status register bit mode symbol reset description notes 0 r adc_status x adc conversion status 1: adc conversion completed 0: adc in progress 1 r vbus_det x vbus voltage is higher than the por 0: no 1: yes 2 r id_float x id line is floating 0: no 1: yes 3 r id_gnd 0 id pin is shorted to ground 0: no 1: yes 4 r dp/dm_short 0 dp/dm shorted 0: no 1: yes 5 r usb_chg 0 a usb charger is connected 0: no 1: yes 6 r fet_status x the on/off status of the power mosfet 0: off 1: on 7 r reserved 0 table 18. control register bit mode symbol reset description notes 1-0 r/w reserved x0 2 w/c reset 0 soft reset. when written to 1, the ic is reset. once the reset is complete, the rst bit is set and the reset bit is cleared automatically. 1: to soft reset the ic 4-3 r/w reserved 00 5 r/w autopsave 1 automatic power save mode detection control 0: disable automatic power save mode detection. device can enter power save mode via the i 2 c 1: enable automatic power save mode detection. 7-6 r/w reserved 01
analog integrated circuit device data 32 freescale semiconductor 34825 functional device operation register map table 19. time delay register bit mode symbol reset description notes 3-0 r/w td 0100 time delay to start the powered ac cessory identification flow after detecting the vbus voltage 0000: 100 ms 0001: 200 ms 0010: 300 ms 0011: 400 ms 0100: 500 ms ...... 1111:1600 ms 7-4 r/w reserved 1001 table 20. device mode register bit mode symbol reset description notes 0 r/c rst 1 this bit indicates if a chip reset has occurred. this bit will be cleared once being read. 0: no. 1: yes. 1 r/w active 0 indicate either the device is in active mode 0: standby 1: active 2 r/w psave 0 to indicate either the device is in power save mode 0: no 1: yes 7-3 reserved 00000
analog integrated circuit device data freescale semiconductor 33 34825 typical applications application information typical applications application information id resistance value assignment the id resistors used with the 34825 are standard 1% resistors. table 21 lists the complete 32 id resistor assignment. the ones with the assigned functions filled are the ones that are already us ed with special functions. the ones reserved can be assigned to other functions. the remote control architec ture is illustrated in figure 26 . the recommended resistors for the remote control resistor network are given in table 22 . figure 26. remote control architecture decoupling capacitor decoupling capacitors are required at all power supply input and output pins. for the vdd pin, a x5r capacitor of 1.0 f is recommended. for vbus pin, because it also acts as the microphone input, the decoupling capacitance at vbus pin must be carefully considered. assuming the voice band is 3.4 khz and the pull-up resistance for the microphone is 2k , the decoupling capacitance at the vbus pin should table 21. id resistance assignment (unit: k ) item# adc result id resistance assignment 0 00000 <1.9 reserved 1 00001 2.0 s0 2 00010 2.604 s1 3 00011 3.208 s2 4 00100 4.014 s3 5 00101 4.820 s4 6 00110 6.03 s5 7 00111 8.03 s6 8 01000 10.03 s7 9 01001 12.03 s8 10 01010 14.46 s9 11 01011 17.26 s10 12 01100 20.5 s11 13 01101 24.07 s12 14 01110 28.7 uart test cable 1 15 01111 34.0 uart test cable 2 16 10000 40.2 usb test cable 1 17 10001 49.9 usb test cable 2 18 10010 64.9 reserved 19 10011 80.6 reserved 20 10100 102 reserved 21 10101 121 reserved 22 10110 150 reserved 23 10111 200 carkit charger type 1 24 11000 255 reserved 25 11001 301 reserved 26 11010 365 reserved 27 11011 442 carkit charger type 2 28 11100 523 reserved 29 11101 619 r/c accessory 1 30 11110 1000 r/c accessory 2 31 11111 - id float table 22. remote control resistor values (unit: k ) resistor standard value id resistance r1 2.0 2.0 r2 0.604 2.604 r3 0.604 3.208 r4 0.806 4.014 r5 0.806 4.82 r6 1.21 6.03 r7 2.0 8.03 r8 2.0 10.03 r9 2.0 12.03 r10 2.43 14.46 r11 2.8 17.26 r12 3.24 20.5 r13 3.57 24.07 r14 590/976 614/1000 table 21. id resistance assignment (unit: k ) item# adc result id resistance assignment ?... r 1 r 2 r 3 r 13 r 14 hold id gnd s0 s1 s2 s12
analog integrated circuit device data 34 freescale semiconductor 34825 typical applications typical applications be less than 22 nf. a 4.7 nf x5r capacitor is recommended for the typical application. the out pin requires a 1.0 f decoupling capacitor; a 0.01 f capacitance is enough for the vddio pin. typical applications interface circuit in a cell phone when the 34825 is used in a cell phone. the typical circuit is shown in the figure 27 . the i 2 c bus need two pull-up resistors. typically they are 4.7 k . when the audio outputs of the cell phone baseband or application processor are direct drive signals, the audio signals can be connected to the corresponding pins of 34825 directly. otherwise these signals need dc-blocking capacitors to remove the dc level. figure 27. interface circuit in a cell phone system v ddio i 2 c_sda i 2 c_scl int vddio rxd txd d+ d- vdd id dp dm gnd vbus id d+ d- gnd i 2 c uart usb xcvr gpio baseband shld out vbus mc34673 iset audio 4.7 nf 1.0 f li+ 1.0 f 9.1 k 12 k 2x4.7 k mic spk_l spk_r 2 k v aio * * for direct-drive audio output, these dc blocking capacitors are not needed * : 0.1 f
analog integrated circuit device data freescale semiconductor 35 34825 typical applications package dimensions package dimensions for the most current package revision, visit www.freescale.com and perform a keyword search using the ?98a? listed below. ep suffix 20 ld. qfn 98asa00037d revision o
analog integrated circuit device data 36 freescale semiconductor 34825 typical applications package dimensions ep suffix 20 ld. qfn 98asa00037d revision o
analog integrated circuit device data freescale semiconductor 37 34825 package dimensions ep suffix 20 ld. qfn 98asa00037d revision o
analog integrated circuit device data 38 freescale semiconductor 34825 revision history revision history revision date description of changes 2.0 3/2010 ? initial release
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